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Olen nõus

Sergei Kostin

https://etis.ee/CV/Sergei_Kostin/est
28.05.1984
sergei.kostin@gmail.com

Teenistuskäik

Töökohad ja ametid
01.10.2018–31.12.2018   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Teadur (0,75)
01.01.2017–30.09.2018   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Teadur (1,00)
01.07.2015–31.12.2016   
Tallinn University of Technology Faculty of Information Technology, Department of Computer Engineering Chair of Computer Systems Test and Verification, Teadur (1,00)
01.09.2013–30.06.2015   
Tallinn University of Technology Faculty of Information Technology, Department of Computer Engineering Chair of Computer Systems Test and Verification, Teadur (0,30)
01.09.2013–30.06.2015   
OÜ Testonica Lab, Arendusinsener (0,70)
01.03.2013–31.08.2013   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool , Teadur (1,00)
01.09.2012–28.02.2013   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool , Teadur (0,60)
01.01.2012–31.12.2013   
OÜ Testonica Lab, arendusinsener
01.09.2011–31.08.2012   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, insener (1,00)
01.09.2009–31.08.2011   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool , Teadur (1,00)
01.07.2008–31.08.2009   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool , Erakorraline teadur (0,50)
01.01.2008–31.12.2009   
OÜ Testonica Lab, arendusinsener
01.09.2007–30.06.2008   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Info- ja kommunikatsioonitehnoloogia doktorikool, Erakorraline teadur (0,50)
2005–2007   
ELIKO Tehnoloogia Arenduskeskus OÜ, arendusinsener (0,50)
 
 
Haridustee
2007–2012   
Tallinna Tehnikaülikool, doktoriõpe, info- ja kommunikatsioonitehnoloogia
2006–2007   
Tallinna Tehnikaülikool (2007- tehnikateaduse magistri kraad; arvuti- ja süsteemitehnika õppekava)
2003–2006   
Tallinna Tehnikaülikool (2006 - tehnikateaduse bakalaureuse kraad; arvuti- ja süsteemitehnika õppekava)
2001–2003   
Maardu Gümnaasium
2000–2001   
Tartu Annelinna Gümnaasium
 
 
Lisainfo
2012 - 2016 Programmeerimine I (IAG0581) ja II (IAG0582) harjutustundide läbiviimine

Kvalifikatsioon

Teaduskraadid
Sergei Kostin, doktorikraad, 2012, (juh) Raimund Ubar, Self-Diagnosis in Digital Systems (Isediagnoosivad digitaalsüsteemid), Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut.
Sergei Kostin, magistrikraad, 2007, (juh) Raimund Ubar, Fault Diagnosis in the BIST Environment, Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut.
 
 
Teaduspreemiad ja tunnustused
2010, Sergei Kostin, Eesti Infotehnoloogia Sihtasutus (EITSA) Stipendium
2009, Sergei Kostin, Eesti Infotehnoloogia Sihtasutus (EITSA) Stipendium
2008, Sergei Kostin, Eesti Infotehnoloogia Sihtasutus (EITSA) Stipendium
2007, Sergei Kostin, Eesti Infotehnoloogia Sihtasutus (EITSA) Stipendium
 
 
Teadustöö põhisuunad
ETIS KLASSIFIKAATOR: 4. Loodusteadused ja tehnika; 4.6. Arvutiteadused; TÄPSUSTUS: Digitaalsüsteemide testimine ja diagnostika

Lõppenud projektid

Publikatsioonid

Klass
Aasta
Publikatsioon
 
1.1.
2018
Ubar, Raimund; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Juerimaegi, Lembit (2018). Fast identification of true critical paths in sequential circuits. Microelectronics Reliability, 81, 252−261. DOI: 10.1016/j.microrel.2017.11.027.
1.1.
2018
Kõusaar, Jaak; Ubar, Raimund; Kostin, Sergei; Devadze, Sergei; Raik Jaan (2018). Exact Parallel Critical Path Fault Tracing to Speed-Up Fault Simulation in Sequential Circuits. International Journal of Microelectronics and Computer Science, 9 (1), 9−18.
3.1.
2018
Jürimagi, Lembit; Ubar, Raimund; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei (2018). Hierarchical Timing-Critical Paths Analysis in Sequential Circuits. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Platja D'Aro, Hispaania, 2018. IEEE, 1−6.
3.1.
2018
Kõusaar, Jaak; Ubar, Raimund; Kostin, Sergei; Devadze, Sergei; Raik, Jaan (2018). Parallel Critical Path Tracing Fault Simulation in Sequential Circuits. 25th International Conference Mixed Design of Integrated Circuits and Systems – MIXDES. Gdynia, Poland, June 21-23, 2018.. ieee, 305−310.
3.1.
2017
Ubar, Raimund; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan (2017). A Scalable Technique to Identify True Critical Paths in Sequential Circuits. In: Proc. of IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - DDECS (1−6). Dresden: IEEE Computer Cociety.
1.1.
2016
Jenihhin, Maksim; Squillero, Giovanni; Copetti, Thiago Santos; Tihhomirov, Valentin; Kostin, Sergei; Gaudesi, Marco; Vargas, Fabian; Raik, Jaan; Sonza Reorda, Matteo; Bolzani Poehls, Leticia; Ubar, Raimund; Medeiros, Guilherme Cardoso (2016). Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. Journal of Electronic Testing-Theory and Applications, 273−289. DOI: 10.1007/s10836-016-5589-x.
3.1.
2016
Kostin, Sergei; Orasson, Elmet; Ubar, Raimund (2016). A Tool Set for Teaching Design-for-Testability of Digital Circuits. In: Proc. of 11th European Workshop on Microelectronics Education. Southampton (1−6). IEEE Computer Society Press.
3.1.
2016
Osimiry, E.; Kostin, S.; Raik, J.; Ubar, R. (2016). A Tool for Random Test Generation Targeting High Diagnostic Resolution. In: 15th Biennial Baltic Electronics Conference (1−4). ieee: IEEE Computer Society Press.
3.1.
2016
Osimiry, Emmanuel Ovie; Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2016). A novel random approach to diagnostic test generation. IEEE NorCAS Conference, Copenhagen, Nov 1-2, 2016.: IEEE NorCAS Conference, Copenhagen, Nov 1-2, 2016.. IEEE Computer Society Press, 1−6.
3.1.
2016
Copetti, Thiago; Medeiros, Guilherme; Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund. (2016). Gate-Level Modelling of NBTI-Induced Delays Under Process Variations. 17th IEEE Latin-American Test Symposium (LATS 2016), Foz do Iguaçu, Brazil, 6th - 8th April 2016. IEEE Computer Society Press, 75−80.
3.1.
2015
Palermo, N.; Tihhomirov, V.; Copetti, T.S.; Jenihhin, M.; Raik, J.; Kostin, S.; Gaudesi, M.; Squillero, G.; Sonza Reorda, M.; Vargas, F.; Bolzani Poehls, L. (2015). Rejuvenation of Nanoscale Logic at NBTI-Critical Paths Using Evolutionary TPG. In: 16th IEEE Latin-American Test Symposium March 25 - 27, 2015, Puerto Vallarta, Mexico (1−6). IEEE Computer Society Press.
3.1.
2015
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Copetti, Thiago; Vargas, Fabian; Bolzani Poehls, Leticia (2015). SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic. IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015, Belgrade, Serbia (1−6). IEEE Computer Society Press.
3.4.
2015
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Copetti, Thiago; Vargas, Fabian; Bolzani Poehls, Leticia. (2015). Accurate NBTI-induced Gate Delay Modeling Based on Intensive SPICE Simulations. Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale - MEDIAN Finale, Tallinn, Estonia, November 10-11, 2015. , 21−26.
1.1.
2014
Ubar, Raimund; Kostin, Sergei; Kruus, Helena; Aarna, Margit; Devadze, Sergei (2014). Environment for Analysis of Functional Self-Test Quality in Digital Systems. Proceedings of the Estonian Academy of Sciences, 2 (63), 151−162.
3.1.
2014
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Vargas, Fabian; Bolzani Poehls, Leticia; Copetti, Thiago. (2014). Hierarchical Identification of NBTI-Critical Gates in Nanoscale Logic. Proc. of 14th IEEE Latin-American Test Workshop: 14th IEEE Latin-American Test Workshop (LATW), Fortaleza, Brazil, 12-15 March 2014. Fortaleza, Brazil: IEEE Computer Society, 1−6. DOI: 10.1109/LATW.2014.6841926.
3.1.
2014
Kostin, Sergei; Ubar, Raimund; Mägi, Gunnar; Gorev, Maksim. (2014). Comparison of two approaches to improve functional BIST fault coverage. In: Proceedings of Baltic Electronics Conference – BEC (1−4). IEEE Computer Society.
1.1.
2013
Fridolin, I.; Karai, D. ; Kostin, S. ; Ubar, R. (2013). Accurate Dialysis Dose Evaluation and Extrapolation Algorithms during On-line Optical Dialysis Monitoring. IEEE Transactions on Biomedical Engineering, 60 (5), 1371−1377.10.1109/TBME.2012.2234458.
3.1.
2013
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2013). Synthesis of Multiple Fault Oriented Test Groups from Single Fault Test Sets. In: 8th Int. Conference on Design & Technology of Integrated Systems in Nanoscale Era - DTIS’13 (1−6). Abu-Dhabi, United Arab Emirates: IEEE Computer Society.
3.1.
2013
Ubar, Raimund; Vargas, Fabian; Jenihhin, Maksim; Raik, Jaan; Kostin, Serge; Bolzani Poehls, Letícia (2013). Identifying NBTI-Critical Paths in Nanoscale Logic. Proceedings of the 16th Euromicro Conference on Digital System Design: 16th Euromicro Conference on Digital System Design, Santander, Spain, September 4-6, 2013. IEEE Computer Society Press, 136−141.
2.3.
2012
Kostin, Sergei (2012). Self-diagnosis in digital systems. (Doktoritöö, Tallinn Tehnikaülikool / Arvutitehnika instituut). Tallinn: Tallinn University of Technology Press.
3.1.
2012
Ubar, Raimund; Raik, Jaan; Kostin, Sergei; Kõusaar, Jaak (2012). Multiple Fault Diagnosis with BDD based Boolean Differential Equations. Proc. of Baltic Electronics Conference, Tallinn, October 3-5, 2012. IEEE Computer Society.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). SSBDDs and Double Topology for Multiple Fault Reasoning (Invited paper). Proc. of 10th East-West Design & Test Symposium, Kharkov, Ukraine, September 14-17, 2012. IEEE Computer Society.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). How to Prove that a Circuit is Fault-Free? Proc. EUROMICRO, Cesme, Turkey, Sept. 5-8, 2012. IEEE Computer Society, 1−4.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). Multiple Stuck-at-Fault Detection Theorem. 15th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, April 18-20, 2012, Tallinn, Estonia. IEEE, 236−241. DOI: 10.1109/DDECS.2012.6219064.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). About Robustness of Test Patterns Regarding Multiple Faults. 13th Latin-American Test Workshop, Quito, Ecuador, April 10-13, 2012. IEEE, 86−91. DOI: 10.1109/LATW.2012.6261243.
3.2.
2012
Ubar, Raimund; Kostin, Sergei; Orasson, Elmet; Evartson, Teet; Brik, Marina (2012). A Tool for Teaching Hierarchical Fault Diagnosis in Digital Circuits. Proc. of 9th European Workshop on Microelectronics Education – EWME’12. Grenoble, France: CNRS, 1−4.
1.2.
2011
Kostin, Sergei; Ubar, Raimund; Raik, Jaan; Brik, Marina (2011). Hierarchical Physical Defect Reasoning in Digital Circuits. Estonian Journal of Engineering, 17 (3), 1−15.
3.1.
2011
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2011). Defect-Oriented Module-Level Fault Diagnosis in Digital Circuits. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, April 13-15, 2011, Cottbus, Germany. IEEE Computer Society Press, 81−86.
3.1.
2010
Talisainen, A.; Kostin, S.; Karai, D.; Fridolin, I.; Ubar, R. (2010). Dialysis Adequacy On-Line Monitoring Using Diasens Optical Sensor: Accurate Kt/V Estimation by Smoothing Algorithms. Proceedings of the 12th Biennial Baltic Electronics Conference BEC 2010: 12th Biennial Baltic Electronics Conference, Tallinn, October 4-6, 2010.. Ed. Rang, T.; Ellervee, P.; Min, M. Tallinn: IEEE, 273−276.
3.1.
2010
Kostin, S.; Ubar, R.; Raik, J. (2010). Macro Level Defect-Oriented Diagnosability of Digital Circuits. Proceedings of the 12th Biennial Baltic Electronic Conference BEC2010: IEEE 2010 12th Biennial Baltic Electronics Conference (October 4-6, 2010, Tallinn, Estonia). Ed. T. Rang, P. Ellervee, M. Min. IEEE, 149−152.
3.2.
2010
Ubar, Raimund; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Aleksejev, Igor; Chepurov, Anton; Chertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, H.-D. (2010). E-Learning Environment for WEB-Based Study of Testing. Proc. of the 8th European Workshop on Microelectronics Education - EWME 2010: 8th European Workshop on Microelectronics Education - EWME 2010. Saksamaa, Darmstadt, 47−52.
3.1.
2009
Ubar, R.; Kostin, S.; Raik, J. (2009). Block-Level Model-Free Debug and Fault Diagnosis in Digital Systems. 12th EUROMICRO Conference on Digital System Design – DSD 2009: 12th EUROMICRO Conference on Digital System Design – DSD 2009. Patras, Greece, August 27-29, 2009. , 229-232.
3.1.
2009
Ubar, R.; Kostin, S.; Jutman, A.; Raik, J.; Wuttke, H.-D. (2009). DIAGNOZER: A Laboratory Tool for Teaching Research in Diagnosis of Electronic Systems. Proc. of 2009 International Conf. on Microelectronic Systems Education: International Conference on Microelectronic Systems Education, San Francisco, July 25-26, 2009. , 12−15.
3.1.
2009
Ubar, R.; Kostin, S.; Raik, J. (2009). Combined Fault-Model Free Cause-Effect and Effect-Cause Fault Diagnosis in Block-Level Digital Networks,. 1st Asia Symposium on Quality Electronic Design ASQED’09, Kuala Lumpur, July 15-16, 2009. , 385−390.
3.1.
2009
Kostin, Sergei; Ubar, Raimund; Raik, Jaan; Aarna, Margit; Brik, Marina; Wuttke, Heinz-Dietrich (2009). Teaching Research in the Laboratory Using Diagnosis Environment for Digital Systems. 20th EAEEIE Conference Formal Proceedings: 20th EAEEIE Annual Conference on Innovation in Education for Electrical and Information Engineering, Valencia, Spain, June 22-24, 2009. IEEE, 1−4. DOI: 10.1109/EAEEIE.2009.5335462.
3.1.
2009
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2009). Investigations of the Diagnosibility of Digital Networks with BIST. 10th IEEE Latin-American Test Workshop – LATW 2009 (1−6). . Rio de Janeiro, Brazil: IEEE Computer Society Press.
1.1.
2008
Ubar, R.; Kostin, S.; Raik, J. (2008). Embedded fault diagnosis in digital systems with BIST. Microprocessors and Microsystems, 32, 279−287.
3.1.
2008
Ubar, R.; Kostin, S.; Raik, J. (2008). Embedded Diagnosis in Digital Systems. 26th International Conference on Microelectronics (MIEL 2008): Nis, Serbia, 11-14 May 2008. IEEE Computer Society Press, 421−424.
3.1.
2008
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2008). Calculation of the Diagnosibility of Digital Circuits without Using Fault Models. In: 11th Biennial Baltic Electronics Conference (159−162). . IEEE.
3.2.
2008
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2008). Built-In Self Diagnosis with Multiple Signature Analyzers in Digital Systems. 9th IEEE Latin American Test Workshop , February 17-20, 2008, Puebla, Mexico. IEEE, 29−34.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan; Evartson, Teet; Lensen, Harri (2007). Fault Diagnosis in Integrated Circuits with BIST. In: Proceedings of 10th EUROMICRO Conference on Digital System Design - DSD 2007 (604-610). . IEEE Computer Society Press.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan; Kruus, Margus (2007). Experimental Comparison of Different Diagnosis Algorithms in the BIST Environment. In: IASTED Conference on Applied Simulation and Modelling - ASM 2007 (N/A). . ACTA Press.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2007). Experimental Comparison of Different Diagnosis Algorithms in the BIST Environment. In: Proceedings 8th IEEE Latin-American Test Workshop - LATW2007 (1−6). . IEEE Computer Society.
1.10.2019

Sergei Kostin

https://etis.ee/CV/Sergei_Kostin/eng
28.05.1984
sergei.kostin@gmail.com

Career

Institutions and positions
01.10.2018–31.12.2018   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Researcher (0,75)
01.01.2017–30.09.2018   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Research Scientist (1,00)
01.07.2015–31.12.2016   
Tallinn University of Technology Faculty of Information Technology, Department of Computer Engineering Chair of Computer Systems Test and Verification, Researcher (1,00)
01.09.2013–30.06.2015   
Tallinn University of Technology Faculty of Information Technology, Department of Computer Engineering Chair of Computer Systems Test and Verification, Researcher (0,30)
01.09.2013–30.06.2015   
Testonica Lab, Development Engineer (0,70)
01.03.2013–31.08.2013   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Test and Verification, Researcher (1,00)
01.09.2012–28.02.2013   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Test and Verification, Researcher (0,60)
01.01.2012–31.12.2013   
Testonica Lab, Development Engineer
01.09.2011–31.08.2012   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Engineer (1,00)
01.09.2009–31.08.2011   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Test and Verification, Researcher (1,00)
01.07.2008–31.08.2009   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Test and Verification, Extraordinary Researcher (0,50)
01.01.2008–31.12.2009   
Testonica Lab, Development Engineer
01.09.2007–30.06.2008   
Tallinn University of Technology , School of Information Technologies, Info- ja kommunikatsioonitehnoloogia doktorikool, Extraordinary Researcher (0,50)
2005–2007   
ELIKO Competence Centre in Electronics-, Info- and Communication Technologies, Development Engineer (0,50)
 
 
Education
2007–2012   
Tallinn University of Technology, Ph.D. study, Information and Communication Technology
2006–2007   
Tallinn University of Technology (2007 - Master Degree in Computer-and System Engineering)
2003–2006   
Tallinn University of Technology (2006 - Bachelor Degree in Computer-and System Engineering)
2001–2003   
Maardu high school
2000–2001   
Tartu Annelinna high school
 
 
Additional information
2012 - 2016 Programming I (IAG0581) ja II (IAG0582) practical exercises

Qualifications

Academic degrees
Sergei Kostin, Doctor's Degree, 2012, (sup) Raimund Ubar, Self-Diagnosis in Digital Systems, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering.
Sergei Kostin, Master's Degree, 2007, (sup) Raimund Ubar, Fault Diagnosis in the BIST Environment, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering.
 
 
Honours & awards
2010, Sergei Kostin, Scholarship of Estonian Information Technology Foundation
2009, Sergei Kostin, Scholarship of Estonian Information Technology Foundation
2008, Sergei Kostin, Scholarship of Estonian Information Technology Foundation
2007, Sergei Kostin, Scholarship of Estonian Information Technology Foundation
 
 
Fields of research
ETIS CLASSIFICATION: 4. Natural Sciences and Engineering; 4.6. Computer Sciences; SPECIFICATION: Testing and Diagnosis of Digital Systems
 
 

Completed projects

Publications

Category
Year
Publication
 
1.1.
2018
Ubar, Raimund; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Juerimaegi, Lembit (2018). Fast identification of true critical paths in sequential circuits. Microelectronics Reliability, 81, 252−261. DOI: 10.1016/j.microrel.2017.11.027.
1.1.
2018
Kõusaar, Jaak; Ubar, Raimund; Kostin, Sergei; Devadze, Sergei; Raik Jaan (2018). Exact Parallel Critical Path Fault Tracing to Speed-Up Fault Simulation in Sequential Circuits. International Journal of Microelectronics and Computer Science, 9 (1), 9−18.
3.1.
2018
Jürimagi, Lembit; Ubar, Raimund; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei (2018). Hierarchical Timing-Critical Paths Analysis in Sequential Circuits. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Platja D'Aro, Hispaania, 2018. IEEE, 1−6.
3.1.
2018
Kõusaar, Jaak; Ubar, Raimund; Kostin, Sergei; Devadze, Sergei; Raik, Jaan (2018). Parallel Critical Path Tracing Fault Simulation in Sequential Circuits. 25th International Conference Mixed Design of Integrated Circuits and Systems – MIXDES. Gdynia, Poland, June 21-23, 2018.. ieee, 305−310.
3.1.
2017
Ubar, Raimund; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan (2017). A Scalable Technique to Identify True Critical Paths in Sequential Circuits. In: Proc. of IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - DDECS (1−6). Dresden: IEEE Computer Cociety.
1.1.
2016
Jenihhin, Maksim; Squillero, Giovanni; Copetti, Thiago Santos; Tihhomirov, Valentin; Kostin, Sergei; Gaudesi, Marco; Vargas, Fabian; Raik, Jaan; Sonza Reorda, Matteo; Bolzani Poehls, Leticia; Ubar, Raimund; Medeiros, Guilherme Cardoso (2016). Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits. Journal of Electronic Testing-Theory and Applications, 273−289. DOI: 10.1007/s10836-016-5589-x.
3.1.
2016
Kostin, Sergei; Orasson, Elmet; Ubar, Raimund (2016). A Tool Set for Teaching Design-for-Testability of Digital Circuits. In: Proc. of 11th European Workshop on Microelectronics Education. Southampton (1−6). IEEE Computer Society Press.
3.1.
2016
Osimiry, E.; Kostin, S.; Raik, J.; Ubar, R. (2016). A Tool for Random Test Generation Targeting High Diagnostic Resolution. In: 15th Biennial Baltic Electronics Conference (1−4). ieee: IEEE Computer Society Press.
3.1.
2016
Osimiry, Emmanuel Ovie; Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2016). A novel random approach to diagnostic test generation. IEEE NorCAS Conference, Copenhagen, Nov 1-2, 2016.: IEEE NorCAS Conference, Copenhagen, Nov 1-2, 2016.. IEEE Computer Society Press, 1−6.
3.1.
2016
Copetti, Thiago; Medeiros, Guilherme; Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund. (2016). Gate-Level Modelling of NBTI-Induced Delays Under Process Variations. 17th IEEE Latin-American Test Symposium (LATS 2016), Foz do Iguaçu, Brazil, 6th - 8th April 2016. IEEE Computer Society Press, 75−80.
3.1.
2015
Palermo, N.; Tihhomirov, V.; Copetti, T.S.; Jenihhin, M.; Raik, J.; Kostin, S.; Gaudesi, M.; Squillero, G.; Sonza Reorda, M.; Vargas, F.; Bolzani Poehls, L. (2015). Rejuvenation of Nanoscale Logic at NBTI-Critical Paths Using Evolutionary TPG. In: 16th IEEE Latin-American Test Symposium March 25 - 27, 2015, Puerto Vallarta, Mexico (1−6). IEEE Computer Society Press.
3.1.
2015
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Copetti, Thiago; Vargas, Fabian; Bolzani Poehls, Leticia (2015). SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic. IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015, Belgrade, Serbia (1−6). IEEE Computer Society Press.
3.4.
2015
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Copetti, Thiago; Vargas, Fabian; Bolzani Poehls, Leticia. (2015). Accurate NBTI-induced Gate Delay Modeling Based on Intensive SPICE Simulations. Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale - MEDIAN Finale, Tallinn, Estonia, November 10-11, 2015. , 21−26.
1.1.
2014
Ubar, Raimund; Kostin, Sergei; Kruus, Helena; Aarna, Margit; Devadze, Sergei (2014). Environment for Analysis of Functional Self-Test Quality in Digital Systems. Proceedings of the Estonian Academy of Sciences, 2 (63), 151−162.
3.1.
2014
Kostin, Sergei; Raik, Jaan; Ubar, Raimund; Jenihhin, Maksim; Vargas, Fabian; Bolzani Poehls, Leticia; Copetti, Thiago. (2014). Hierarchical Identification of NBTI-Critical Gates in Nanoscale Logic. Proc. of 14th IEEE Latin-American Test Workshop: 14th IEEE Latin-American Test Workshop (LATW), Fortaleza, Brazil, 12-15 March 2014. Fortaleza, Brazil: IEEE Computer Society, 1−6. DOI: 10.1109/LATW.2014.6841926.
3.1.
2014
Kostin, Sergei; Ubar, Raimund; Mägi, Gunnar; Gorev, Maksim. (2014). Comparison of two approaches to improve functional BIST fault coverage. In: Proceedings of Baltic Electronics Conference – BEC (1−4). IEEE Computer Society.
1.1.
2013
Fridolin, I.; Karai, D. ; Kostin, S. ; Ubar, R. (2013). Accurate Dialysis Dose Evaluation and Extrapolation Algorithms during On-line Optical Dialysis Monitoring. IEEE Transactions on Biomedical Engineering, 60 (5), 1371−1377.10.1109/TBME.2012.2234458.
3.1.
2013
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2013). Synthesis of Multiple Fault Oriented Test Groups from Single Fault Test Sets. In: 8th Int. Conference on Design & Technology of Integrated Systems in Nanoscale Era - DTIS’13 (1−6). Abu-Dhabi, United Arab Emirates: IEEE Computer Society.
3.1.
2013
Ubar, Raimund; Vargas, Fabian; Jenihhin, Maksim; Raik, Jaan; Kostin, Serge; Bolzani Poehls, Letícia (2013). Identifying NBTI-Critical Paths in Nanoscale Logic. Proceedings of the 16th Euromicro Conference on Digital System Design: 16th Euromicro Conference on Digital System Design, Santander, Spain, September 4-6, 2013. IEEE Computer Society Press, 136−141.
2.3.
2012
Kostin, Sergei (2012). Self-diagnosis in digital systems. (Doktoritöö, Tallinn Tehnikaülikool / Arvutitehnika instituut). Tallinn: Tallinn University of Technology Press.
3.1.
2012
Ubar, Raimund; Raik, Jaan; Kostin, Sergei; Kõusaar, Jaak (2012). Multiple Fault Diagnosis with BDD based Boolean Differential Equations. Proc. of Baltic Electronics Conference, Tallinn, October 3-5, 2012. IEEE Computer Society.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). SSBDDs and Double Topology for Multiple Fault Reasoning (Invited paper). Proc. of 10th East-West Design & Test Symposium, Kharkov, Ukraine, September 14-17, 2012. IEEE Computer Society.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). How to Prove that a Circuit is Fault-Free? Proc. EUROMICRO, Cesme, Turkey, Sept. 5-8, 2012. IEEE Computer Society, 1−4.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). Multiple Stuck-at-Fault Detection Theorem. 15th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, April 18-20, 2012, Tallinn, Estonia. IEEE, 236−241. DOI: 10.1109/DDECS.2012.6219064.
3.1.
2012
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2012). About Robustness of Test Patterns Regarding Multiple Faults. 13th Latin-American Test Workshop, Quito, Ecuador, April 10-13, 2012. IEEE, 86−91. DOI: 10.1109/LATW.2012.6261243.
3.2.
2012
Ubar, Raimund; Kostin, Sergei; Orasson, Elmet; Evartson, Teet; Brik, Marina (2012). A Tool for Teaching Hierarchical Fault Diagnosis in Digital Circuits. Proc. of 9th European Workshop on Microelectronics Education – EWME’12. Grenoble, France: CNRS, 1−4.
1.2.
2011
Kostin, Sergei; Ubar, Raimund; Raik, Jaan; Brik, Marina (2011). Hierarchical Physical Defect Reasoning in Digital Circuits. Estonian Journal of Engineering, 17 (3), 1−15.
3.1.
2011
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2011). Defect-Oriented Module-Level Fault Diagnosis in Digital Circuits. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, April 13-15, 2011, Cottbus, Germany. IEEE Computer Society Press, 81−86.
3.1.
2010
Talisainen, A.; Kostin, S.; Karai, D.; Fridolin, I.; Ubar, R. (2010). Dialysis Adequacy On-Line Monitoring Using Diasens Optical Sensor: Accurate Kt/V Estimation by Smoothing Algorithms. Proceedings of the 12th Biennial Baltic Electronics Conference BEC 2010: 12th Biennial Baltic Electronics Conference, Tallinn, October 4-6, 2010.. Ed. Rang, T.; Ellervee, P.; Min, M. Tallinn: IEEE, 273−276.
3.1.
2010
Kostin, S.; Ubar, R.; Raik, J. (2010). Macro Level Defect-Oriented Diagnosability of Digital Circuits. Proceedings of the 12th Biennial Baltic Electronic Conference BEC2010: IEEE 2010 12th Biennial Baltic Electronics Conference (October 4-6, 2010, Tallinn, Estonia). Ed. T. Rang, P. Ellervee, M. Min. IEEE, 149−152.
3.2.
2010
Ubar, Raimund; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Aleksejev, Igor; Chepurov, Anton; Chertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, H.-D. (2010). E-Learning Environment for WEB-Based Study of Testing. Proc. of the 8th European Workshop on Microelectronics Education - EWME 2010: 8th European Workshop on Microelectronics Education - EWME 2010. Saksamaa, Darmstadt, 47−52.
3.1.
2009
Ubar, R.; Kostin, S.; Raik, J. (2009). Block-Level Model-Free Debug and Fault Diagnosis in Digital Systems. 12th EUROMICRO Conference on Digital System Design – DSD 2009: 12th EUROMICRO Conference on Digital System Design – DSD 2009. Patras, Greece, August 27-29, 2009. , 229-232.
3.1.
2009
Ubar, R.; Kostin, S.; Jutman, A.; Raik, J.; Wuttke, H.-D. (2009). DIAGNOZER: A Laboratory Tool for Teaching Research in Diagnosis of Electronic Systems. Proc. of 2009 International Conf. on Microelectronic Systems Education: International Conference on Microelectronic Systems Education, San Francisco, July 25-26, 2009. , 12−15.
3.1.
2009
Ubar, R.; Kostin, S.; Raik, J. (2009). Combined Fault-Model Free Cause-Effect and Effect-Cause Fault Diagnosis in Block-Level Digital Networks,. 1st Asia Symposium on Quality Electronic Design ASQED’09, Kuala Lumpur, July 15-16, 2009. , 385−390.
3.1.
2009
Kostin, Sergei; Ubar, Raimund; Raik, Jaan; Aarna, Margit; Brik, Marina; Wuttke, Heinz-Dietrich (2009). Teaching Research in the Laboratory Using Diagnosis Environment for Digital Systems. 20th EAEEIE Conference Formal Proceedings: 20th EAEEIE Annual Conference on Innovation in Education for Electrical and Information Engineering, Valencia, Spain, June 22-24, 2009. IEEE, 1−4. DOI: 10.1109/EAEEIE.2009.5335462.
3.1.
2009
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2009). Investigations of the Diagnosibility of Digital Networks with BIST. 10th IEEE Latin-American Test Workshop – LATW 2009 (1−6). . Rio de Janeiro, Brazil: IEEE Computer Society Press.
1.1.
2008
Ubar, R.; Kostin, S.; Raik, J. (2008). Embedded fault diagnosis in digital systems with BIST. Microprocessors and Microsystems, 32, 279−287.
3.1.
2008
Ubar, R.; Kostin, S.; Raik, J. (2008). Embedded Diagnosis in Digital Systems. 26th International Conference on Microelectronics (MIEL 2008): Nis, Serbia, 11-14 May 2008. IEEE Computer Society Press, 421−424.
3.1.
2008
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2008). Calculation of the Diagnosibility of Digital Circuits without Using Fault Models. In: 11th Biennial Baltic Electronics Conference (159−162). . IEEE.
3.2.
2008
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2008). Built-In Self Diagnosis with Multiple Signature Analyzers in Digital Systems. 9th IEEE Latin American Test Workshop , February 17-20, 2008, Puebla, Mexico. IEEE, 29−34.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan; Evartson, Teet; Lensen, Harri (2007). Fault Diagnosis in Integrated Circuits with BIST. In: Proceedings of 10th EUROMICRO Conference on Digital System Design - DSD 2007 (604-610). . IEEE Computer Society Press.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan; Kruus, Margus (2007). Experimental Comparison of Different Diagnosis Algorithms in the BIST Environment. In: IASTED Conference on Applied Simulation and Modelling - ASM 2007 (N/A). . ACTA Press.
3.1.
2007
Ubar, Raimund; Kostin, Sergei; Raik, Jaan (2007). Experimental Comparison of Different Diagnosis Algorithms in the BIST Environment. In: Proceedings 8th IEEE Latin-American Test Workshop - LATW2007 (1−6). . IEEE Computer Society.
1.10.2019

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ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
ETFETF7483Isediagnoosivad digitaalsüsteemid01.01.200831.12.2011Raimund UbarTallinna Tehnikaülikool, Infotehnoloogia teaduskond55 414,27 EUR
ETFETF9423Kiibisisesed instrumendid elektroonikasüsteemide testimiseks01.01.201231.12.2015Sergei DevadzeTallinna Tehnikaülikool, Infotehnoloogia teaduskond46 440,00 EUR
ETFETF7068Kõrgtaseme otsustusdiagrammidel põhinevad digitaalsüsteemide verifitseerimis- ja testimismeetodid01.01.200731.12.2010Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond39 083,26 EUR
MUULep9007Tehnoloogia arenduskeskus ELIKO projekt 2.2 Sardsüsteemide test, verifitseerimine ja silumine01.09.200830.06.2009Jaan RaikTallinna Tehnikaülikool; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool 8 500,25 EUR
SFSF0140041s08Töökindlate sardsüsteemide disain01.01.200831.12.2013Raimund UbarTallinna Tehnikaülikool, Infotehnoloogia teaduskond1 504 530,37 EUR
IUTIUT19-1Usaldusväärsed mitmetuumalised arvutisüsteemid01.01.201431.12.2019Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut1 572 000,00 EUR